/*
 * Copyright (C) 2018 Hisilicon Limited.
 *
 * this program is for chip mini pcie ap dma
 *
 * This program is free software; you can redistribute it and /or modify it
 * under the terms of the GNU General Public License as published by the Free
 * Software Foundation; either version 2 of the License, or (at your option)
 * any later version
 */

#include <asm/io.h>

#include "dma_drv.h"

int devdrv_get_dma_err_chan(void __iomem *io_base, u32 *chan_id)
{
    return -EINVAL;
}

void devdrv_dma_config_axim_aruser_mode(void __iomem *io_base)
{
    return;
}

void devdrv_dma_check_sram_init_status(void __iomem *io_base, unsigned long timeout)
{
    return;
}

void devdrv_dma_set_sq_addr_info(struct devdrv_dma_sq_node *sq_desc, u64 src_addr, u64 dst_addr, u32 length)
{
    sq_desc->src_addr_l = (u32)src_addr;
    sq_desc->src_addr_h = (u32)(src_addr >> 32);

    sq_desc->dst_addr_l = (u32)dst_addr;
    sq_desc->dst_addr_h = (u32)(dst_addr >> 32);

    sq_desc->length = length;
}

void devdrv_dma_set_sq_attr(struct devdrv_dma_sq_node *sq_desc, u32 opcode, u32 attr, u32 pf, u32 wd_barrier,
    u32 rd_barrier)
{
    sq_desc->opcode = opcode;
    sq_desc->attr = attr;
    sq_desc->pf = pf;
    devdrv_debug("opcode %x, attr %x, pf %x\n", opcode, attr, pf);
}

void devdrv_dma_set_sq_irq(struct devdrv_dma_sq_node *sq_desc, u32 rdie, u32 ldie, u32 msi)
{
    sq_desc->rdie = rdie;
    sq_desc->ldie = ldie;
    sq_desc->msi = msi;
    devdrv_debug("rdie %x, ldie %x, msi %x\n", rdie, ldie, msi);
}

bool devdrv_dma_get_cq_valid(struct devdrv_dma_cq_node *cq_desc, u32 rounds)
{
    (void)rounds;
    return (cq_desc->vld == 1);
}

void devdrv_dma_set_cq_invalid(struct devdrv_dma_cq_node *cq_desc)
{
    cq_desc->vld = 0;
}

u32 devdrv_dma_get_cq_sqhd(struct devdrv_dma_cq_node *cq_desc)
{
    return (u32)cq_desc->sqhd;
}

u32 devdrv_dma_get_cq_status(struct devdrv_dma_cq_node *cq_desc)
{
    return (u32)cq_desc->status;
}
